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FEATURES 5.5 (Max) On Resistance 0.9 (Max) On-Resistance Flatness 2.7 V to 5.5 V Single Supply 2.7 V to 5.5 V Dual Supply Rail-to-Rail Operation 10-Lead SOIC Package Typical Power Consumption (<0.01 W) TTL/CMOS Compatible Inputs APPLICATIONS Automatic Test Equipment Power Routing Communication Systems Data Acquisition Systems Sample and Hold Systems Avionics Relay Replacement Battery-Powered Systems
S1 D1
CMOS 5 V/5 V 4 Dual SPST Switches ADG621/ADG622/ADG623
FUNCTIONAL BLOCK DIAGRAM
ADG621
S1 IN1 D1 D2 IN2 S2 IN2 S2 D2 IN1
ADG622
ADG623
S1 IN1 D1 D2 IN2 S2
SWITCHES SHOWN FOR A LOGIC "0" INPUT
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG621, ADG622, and the ADG623 are monolithic, CMOS SPST (single-pole, single-throw) switches. Each switch of the ADG621, ADG622, and ADG623 conducts equally well in both directions when on. The ADG621/ADG622/ADG623 contain two independent switches. The ADG621 and ADG622 differ only in that both switches are normally open and normally closed respectively. In the ADG623, Switch 1 is normally open and Switch 2 is normally closed. The ADG623 exhibits break-before-make switching action. The ADG621/ADG622/ADG623 offers low on-resistance of 4 , which is matched to within 0.25 between channels. These switches also provide low power dissipation yet gives high switching speeds. The ADG621, ADG622, and ADG623 are available in a 10-lead SOIC package.
1. Low On Resistance (RON) (4 typ) 2. Dual 2.7 V to 5.5 V or Single 2.7 V to 5.5 V 3. Low Power Dissipation. CMOS construction ensures low power dissipation. 4. Tiny 10-Lead SOIC Package
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2001
ADG621/ADG622/ADG623-SPECIFICATIONS
DUAL SUPPLY1
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS tON tOFF Break-Before-Make Time Delay, tBBM (ADG623 Only) Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth -3 dB CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD ISS
2
(VDD = +5 V
10%, VSS = -5 V
10%, GND = 0 V. All specifications -40 C to +85 C unless otherwise noted.)
B Version -40 C to +25 C +85 C VSS to VDD 4 5.5 0.25 0.35 0.9 7
Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ pF typ A typ A max A typ A max
Test Conditions/Comments
VDD = +4.5 V, VSS = -4.5 V VS = 4.5 V, IS = -10 mA, Test Circuit 1 VS = 4.5 V, IS = -10 mA VS = 3.3 V, IS = -10 mA VDD = +5.5 V, VSS = -5.5 V VS = 4.5 V, VD = 4.5 V, Test Circuit 2 VS = 4.5 V, VD = 4.5 V, Test Circuit 2 VS = VD = 4.5 V, Test Circuit 3
0.4 0.9 1.5
0.01 0.25 0.01 0.25 0.01 0.25
1 1 1 2.4 0.8
0.005 0.1 2 75 120 45 70 30 110 -65 -90 230 20 20 70 0.001 1.0 0.001 1.0
VIN = VINL or VINH
155 85 10
RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF, VS1 = VS2 = 3.3 V, Test Circuit 5 VS = 0 V, RS = 0 , CL = 1 nF, Test Circuit 7 RL = 50 , CL = 5 pF, f = 1 MHz, Test Circuit 8 RL = 50 , CL = 5 pF, f = 1 MHz, Test Circuit 10 RL = 50 , CL = 5 pF, Test Circuit 9 f = 1 MHz f = 1 MHz f = 1 MHz VDD = +5.5 V, VSS = -5.5 V Digital Inputs = 0 V or 5.5 V Digital Inputs = 0 V or 5.5 V
NOTES 1 Temperature ranges are as follows: B Version, -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
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ADG621/ADG622/ADG623 SINGLE SUPPLY1
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON tOFF Break-Before-Make Time Delay, tBBM (ADG623 Only) Charge Injection Off Isolation Channel-to-Channel Crosstalk Bandwidth -3 dB CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 7 10 0.5 0.75 0.5
(VDD = +5 V
10%, VSS = 0 V, GND = 0 V. All specifications -40 C to +85 C unless otherwise noted.)
B Version - 40 C to +25 C +85 C 0 V to VDD 12.5
Unit V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ pF typ pF typ pF typ A typ A max
Test Conditions/Comments
VDD = 4.5 V, VSS = 0 V VS = 0 V to 4.5 V, IS = -10 mA, Test Circuit 1 VS = 0 V to 4.5 V, IS = -10 mA VS = 1.5 V to 3.3 V, IS = -10 mA VDD = 5.5 V VS = 1 V/4.5 V, VD = 4.5 V/1 V, Test Circuit 2 VS = 1 V/4.5 V, VD = 4.5 V/1 V, Test Circuit 2 VS = VD = 1 V/4.5 V, Test Circuit 3
1 0.5 1
0.01 0.25 0.01 0.25 0.01 0.25
1 1 1 2.4 0.8
0.005 0.1 2 120 210 50 75 70 6 -65 -90 230 20 20 70 0.001 1.0
VIN = VINL or VINH
260 100 10
RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF VS = 3.3 V, Test Circuit 4 RL = 300 , CL = 35 pF, VS1 = VS2 = 3.3 V, Test Circuit 5 VS = 0 V; RS = 0 , CL = 1 nF, Test Circuit 6 RL = 50 , CL = 5 pF, f = 1 MHz, Test Circuit 7 RL = 50 , CL = 5 pF, f = 1 MHz, Test Circuit 9 RL = 50 , CL = 5 pF, Test Circuit 8 f = 1 MHz f = 1 MHz f = 1 MHz VDD = 5.5 V Digital Inputs = 0 V or 5.5 V
NOTES 1 Temperature ranges are as follows: B Version, -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
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ADG621/ADG622/ADG623
ABSOLUTE MAXIMUM RATINGS 1
(TA = +25C unless otherwise noted)
Table I. Truth Table for the ADG621/ADG622
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6.5 V VSS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to -6.5 V Analog Inputs2 . . . . . . . . . . . . . . . . . VSS - 0.3 V to VDD + 0.3 V Digital Inputs2 . . . . . . . . . . . . . . . . . . -0.3 V to VDD + 0.3 V or 30 mA, Whichever Occurs First Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA (Pulsed at 1 ms, 10% Duty Cycle max) Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 50 mA Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150C SOIC Package JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44C/W Lead Temperature, Soldering (10 seconds) . . . . . . . . . . . 300C IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . 220C
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.
ADG621 INx 0 1
ADG622 INx 1 0
Switch x Condition OFF ON
Table II. Truth Table for the ADG623
IN1 0 0 1 1
IN2 0 1 0 1
Switch S1 OFF OFF ON ON
Switch S2 ON OFF ON OFF
ORDERING GUIDE
Model Option ADG621BRM ADG622BRM ADG623BRM
Temperature Range -40C to +85C -40C to +85C -40C to +85C
Description SOIC (microSmall Outline IC) SOIC (microSmall Outline IC) SOIC (microSmall Outline IC)
Package RM-10 RM-10 RM-10
Branding Information* SXB SYB SZB
*Branding on SOIC packages is limited to three characters due to space constraints.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG621/ADG622/ADG623 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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ADG621/ADG622/ADG623
PIN CONFIGURATION 10-Lead SOIC (RM-10)
S1 D1 IN2 GND VSS
1 2 3 4 5
10
VDD IN1 D2 S2 NC
ADG621/ ADG622/ ADG623
TOP VIEW (Not to Scale)
9 8 7 6
NC = NO CONNECT
TERMINOLOGY
VDD VSS GND IDD ISS S D IN RON RON RFLAT(ON) IS (OFF) ID (OFF) ID, IS (ON) VD (VS) VINL VINH IINL(IINH) CS (OFF) CD (OFF) CD, CS (ON) tON tOFF tBBM Charge Injection Crosstalk Off Isolation Bandwidth Insertion Loss
Most Positive Power Supply Potential. Most Negative Power Supply in a Dual Supply Application. In single supply applications, this should be tied to ground at the device. Ground (0 V) Reference Positive Supply Current Negative Supply Current Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Logic Control Input Ohmic resistance between D and S. On resistance match between any two Channels i.e., RON max - RON min. Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. Source Leakage Current with the switch "OFF." Drain Leakage Current with the switch "OFF." Channel Leakage Current with the switch "ON." Analog Voltage on Terminals D, S. Maximum Input Voltage for Logic "0." Minimum Input Voltage for Logic "1." Input Current of the Digital Input "OFF" Switch Source Capacitance "OFF" Switch Drain Capacitance "ON" Switch Capacitance Delay between applying the digital control input and the output switching on. Delay between applying the digital control input and the output switching off. "OFF" time or "ON" time measured between the 90% points of both switches, when switching from one address state to another. A measure of the Glitch Impulse transfered from the Digital input to the Analog output during switching. A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. A measure of unwanted signal coupling through an "OFF" switch. The frequency response of the "ON" switch. The loss due to the ON resistance of the Switch.
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ADG621/ADG622/ADG623 -Typical Performance Characteristics
8 TA = 25 C 7 6
ON RESISTANCE -
10 VDD, V SS = 2.5V 9 8 VDD, V SS = 3V
ON RESISTANCE -
VDD = 5V VSS = 0V TA = +85 C TA = +25 C
7 6 5 4 3 2 TA = -40 C
5 VDD, V SS = 4 3 2 1 0 -5 VDD, V SS = 4.5V VDD, V SS = 5V 3.3V
1 -4 -3 -2 -1 0 1 VD, VS - V 2 3 4 5 0 0 1 2 VD, VS - V 3 4 5
TPC 1. On Resistance vs. VD (VS). (Dual Supply)
TPC 4. On Resistance vs. VD (VS) for Different Temperature. (Single Supply)
20 VDD = 2.7V 16
LEAKAGE CURRENT - nA
0.5 TA = 25 C VSS = 0V 0.4 0.3 VDD = 3V 0.2 0.1 0 -0.1 -0.2 -0.3 VDD = 5V VSS = 0V -0.4 VD = 4.5V VS = 4.5V -0.5 0 10 20 ID, IS (ON) ID (OFF) IS (OFF)
ON RESISTANCE -
12 VDD = 3.3V VDD = 4.5V 8 VDD = 5V 4
0
0
1
2 VD, VS - V
3
4
5
30 40 50 60 TEMPERATURE - C
70
80
TPC 2. On Resistance vs. VD (VS). (Single Supply)
TPC 5. Leakage Currents vs. Temperature. (Dual Supply)
6 VDD = +5V VSS = -5V 5 TA = +85 C TA = +25 C 3 TA = -40 C
LEAKAGE CURRENT - nA
0.5 0.4 0.3 0.2 IS (OFF) 0.1 0 -0.1 -0.2 -0.3 VDD = 5V VSS = 0V -0.4 VD = 4.5V/1V VS = 1V/4.5V -0.5 0 10 20 ID, IS (ON) ID (OFF)
ON RESISTANCE -
4
2
1
0 -5
-4
-3
-2
-1
0 1 VD, VS - V
2
3
4
5
30 40 50 60 TEMPERATURE - C
70
80
TPC 3. On Resistance vs. VD (VS) for Different Temperatures. (Dual Supply)
TPC 6. Leakage Currents vs. Temperature. (Single Supply)
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ADG621/ADG622/ADG623
250 TA = 25 C
-10 0 VDD = +5V VSS = -5V TA = 25 C
200
CHARGE INJECTION - pC
-20
ATTENUATION - dB
VDD = +5V VSS = -5V 150
-30 -40 -50 -60 -70 -80
100 VDD = 5V VSS = 0V 50
0 -5
-4
-3
-2
-1
0 VS
1
2
3
4
5
0.2
1
10 FREQUENCY - MHz
100
TPC 7. Charge Injection vs. Source Voltage
TPC 10. Crosstalk vs. Frequency
180 160 140 120
0 -2 VDD = +5V VSS = -5V TA = 25 C
VDD VSS tON
5V 0V ATTENUATION - dB VDD VSS +5V -5V
-4 -6 -8 -10 -12
TIME - ns
100 80 60 40 20 0 -40
tOFF VDD VSS +5V -5V
VDD VSS -20 0
5V 0V 20 40 TEMPERATURE - C
60
80
0.2
1
10 FREQUENCY - MHz
100
1000
TPC 8. tON / tOFF Times vs. Temperature
TPC 11. On Response vs. Frequency
0 -10 -20
ALTERNATION - dB
-30 -40 -50 -60 -70 -80 0.2 1 10 FREQUENCY - MHz VDD = +5V VSS = -5V TA = 25 C 100
TPC 9. OFF Isolation vs. Frequency
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ADG621/ADG622/ADG623 Test Circuits
IDS V1
IS (OFF)
S D
ID (OFF) S D A VD NC S D
ID (ON) A VD
A VS
VS
RON = V1/IDS
NC = NO CONNECT
Test Ciruit 1. On Resistance
Test Ciruit 2. Off Leakage
Test Ciruit 3. On Leakage
0.1 F
VDD
VSS 0.1 F VIN ADG621 D RL 300 VOUT CL 35pF VOUT VIN 50% 50%
VDD S VS
VSS
ADG622
50% 90%
50% 90%
IN GND
tON
tOFF
Test Ciruit 4. Switching Times
VDD 0.1 F VSS 0.1 F VIN D1 D2 RL2 300 GND VOUT2 CL2 35pF VOUT2 90% 0V 90% RL1 300 CL1 35pF VOUT1 VOUT1 0V
VDD VS1 VS2 S1 S2 IN1, IN2 VIN
VSS
0V
50% 90%
50% 90%
tBBM
tBBM
Test Ciruit 5. Break-Before-Make Time Delay, tBBM (ADG623 Only)
VDD VSS SW ON VSS D CL 1nF VOUT GND QINJ = CL VOUT VOUT VOUT VIN SW OFF
VDD RS VS S
IN
Test Ciruit 6. Charge Injection
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ADG621/ADG622/ADG623
VDD 0.1 F VSS 0.1 F NETWORK ANALYZER
VDD 0.1 F
VSS 0.1 F NETWORK ANALYZER
VDD S IN D VIN GND
VSS
VDD S
VSS
50 50 VS VOUT
IN D
50 VS VOUT
RL 50
VIN GND
RL 50
OFF ISOLATION = 20 LOG
VOUT VS
INSERTION LOSS = 20 LOG
VOUT WITH SWITCH VOUT WITHOUT SWITCH
Test Ciruit 7. Off Isolation
VDD 0.1 F NETWORK ANALYZER VOUT RL 50 50 VS GND VSS 0.1 F
Test Ciruit 9. Bandwidth
VDD D1 S2 IN
VSS S1 D2 R 50 R 50
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
VOUT VS
Test Ciruit 8. Channel-to-Channel Crosstalk
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ADG621/ADG622/ADG623
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
10-Lead SOIC Package (RM-10)
0.122 (3.10) 0.114 (2.90)
10
6
0.122 (3.10) 0.114 (2.90)
1 5
0.199 (5.05) 0.187 (4.75)
PIN 1 0.0197 (0.50) BSC 0.120 (3.05) 0.112 (2.85) 0.043 (1.10) MAX 0.028 (0.70) 0.016 (0.40) 0.120 (3.05) 0.112 (2.85)
0.037 (0.94) 0.031 (0.78)
6 0.006 (0.15) 0.012 (0.30) SEATING PLANE 0.009 (0.23) 0 0.002 (0.05) 0.006 (0.15) 0.005 (0.13)
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C02616-.8-10/01(0)
PRINTED IN U.S.A.

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